A 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/s DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique

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dc.contributor.authorBae, Hong-Hyunko
dc.contributor.authorCho, Jeong-Hyunko
dc.contributor.authorKang, Gyeong-Guko
dc.contributor.authorPark, Yousungko
dc.contributor.authorKim, Hyun-Sikko
dc.date.accessioned2022-08-25T03:00:39Z-
dc.date.available2022-08-25T03:00:39Z-
dc.date.created2022-08-02-
dc.date.created2022-08-02-
dc.date.issued2022-06-12-
dc.identifier.citation2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), pp.194 - 195-
dc.identifier.issn0743-1562-
dc.identifier.urihttp://hdl.handle.net/10203/298086-
dc.description.abstractThis paper presents a fast dynamic voltage scaling (DVS) buck converter without losing high efficiency. The proposed isosceles-triangular shunt current (ITSC) push-pull technique allows a turning-point for optimal DVS to be independent of passive components while supplying sufficient current of 35A/s. Current-tailing handover (CTH) realizes no voltage droop after DVS even under resistive loads. ITSC and CTH can also enhance load-transient response. The chip fabricated in 180-nm CMOS achieves 7V/s DVS-rate and 97.6% peak efficiency.-
dc.languageEnglish-
dc.publisherIEEE-
dc.titleA 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/s DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique-
dc.typeConference-
dc.identifier.scopusid2-s2.0-85135240877-
dc.type.rimsCONF-
dc.citation.beginningpage194-
dc.citation.endingpage195-
dc.citation.publicationname2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationHonolulu, HI-
dc.identifier.doi10.1109/vlsitechnologyandcir46769.2022.9830181-
dc.contributor.localauthorKim, Hyun-Sik-
dc.contributor.nonIdAuthorPark, Yousung-
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EE-Conference Papers(학술회의논문)
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