LDPC decoder, operating method of LDPC decoder, and semiconductor memory systemLDPC 디코더, LDPC 디코더 및 반도체 메모리 시스템의 작동 방법

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 127
  • Download : 0
A method for operating a Low Density Parity Check (LDPC) decoder includes assigning each symbol of a codeword as a variable node value for each of a plurality of variable nodes, performing syndrome checking on each check node based on a parity check matrix, calculating flipping function values of the variable nodes based on syndrome values of check nodes and a flipping function, dividing the flipping function values into a plurality of groups, determining a flipping function threshold value based on a group maximum value of a group among the groups, and selectively flipping a variable node value based on a comparison result of a flipping function value of corresponding variable node and the determined flipping function threshold value.
Assignee
KAIST
Country
US (United States)
Application Date
2020-09-25
Application Number
17033075
Registration Date
2022-07-12
Registration Number
11387845
URI
http://hdl.handle.net/10203/297995
Appears in Collection
EE-Patent(특허)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0