Semiconductor fab AMHS track layout design for dynamic routing environment using combinatorial Bayesian optimization

Abstract

We address Bayesian approach for the layout design problem of semiconductor AMHS fab in dynamic routing environment. This thesis focuses on the installation problem of the bypass track, which is installed for the purpose of avoiding congested areas in the overhead hoist transport (OHT) system. The purpose of the study is to search for a bypass installation combination which minimizes the average delivery time through minimal sampling. The performance of the methodology based on combinatorial Bayesian optimization is compared with the heuristic and Genetic algorithm. When compared with the Genetic algorithm, Bayesian algorithm acquires the same result obtained with less sampling. Through the results of the study, the possibility of using Bayesian methodology for the layout design problem is suggested.