(A) power-efficient, wide-frequency-range impedance measurement IC using frequency-shift technique주파수 편이 기법을 이용한 전력 효율적이고 넓은 주파수 범위에서 동작하는 임피던스 측정 집적회로 설계

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This paper proposes an impedance-measurement integrated circuit (IC) that supports a high frequency range up to 10 MHz with low power consumption. The proposed IC extracts the magnitude and phase component of the target impedance, and a reference resistor is connected in series with the target impedance to provide a reference amplitude and time information without the delay of the voltage controlled current source of the transmitter. The chopper frequency-shift the input signal, which range above 100 kHz, to a intermediate frequency of 10 kHz at the front end of the receiver. Therefore, the requirements on the IA bandwidth and the comparator delay are loosed, so the overall power consumption is dramatically reduced. Moreover, the reference magnitude measurement path and auto-zeroing technique is added to achieve higher measurement accuracy. The chip fabricated in a 180-nm CMOS process consumes only 756 µW for a frequency range from 100 Hz to 10 MHz, and the measured magnitude and phase errors are less than 1.1% and 1.9º, respectively.
Advisors
Je, Minkyuresearcher제민규researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2021
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2021.8,[iv, 32 p. :]

Keywords

Polar demodulator▼afrequency-shift technique▼aelectrical impedance spectroscopy (EIS)▼abioimpedance▼aanalog front-end; 극성복조기▼a주파수 편이 기법▼a전기 임피던스 분광법▼a바이오임피던스▼a아날로그 프런트 엔드

URI
http://hdl.handle.net/10203/296059
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=963438&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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