DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Yoo, Hoi-Jun | - |
dc.contributor.advisor | 유회준 | - |
dc.contributor.author | Um, Soyeon | - |
dc.date.accessioned | 2022-04-27T19:31:27Z | - |
dc.date.available | 2022-04-27T19:31:27Z | - |
dc.date.issued | 2021 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=963449&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/296024 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2021.8,[iii, 22 p. :] | - |
dc.description.abstract | Recently, Computing-In-Memory (CIM) processors have been proposed to achieve high energy-efficiency by reducing data movement and solving memory bottlenecks. Furthermore, a network with highly accurate image classification has been introduced through the Absolute-Difference-Accumulation (ADA) operation instead of the multiplication-and-accumulation operation, which is widely used in DNN. ADA operation provides not only opportunities for high energy-efficient DNN accelerating by reducing multiplication but also a chance to reuse computation results. However, the previous CIM processor cannot reuse previous computation results for other computations. In this brief, we propose a highly accurate and high energy-efficient ADA-CIM processor that with two key features: 1) computation reuse for low-power, resulting in a 49.5% CIM operation power reduction, and 2) low-cost sign prediction core with 3-bit activation and weight quantization for high utilization. From the two key features, the proposed ADA-CIM processor is simulated in 28 nm CMOS technology and occupies 3.78 mm2. It consumes 2.77mW and achieves 43.1 TOPS/W energy-efficiency with a high-accuracy of 91.62% at CIFAR-10 (ResNet-20). | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Absolute-difference-accumulation (ADA) operation▼acomputation reuse▼acomputing-in-memory (CIM)▼aenergy-efficient▼alow-cost absolute difference sign prediction▼aSRAM | - |
dc.subject | 절대-차이-누적 연산▼a연산 재사용▼a메모리 내 컴퓨팅▼a에너지 효율▼a저비용 부호 예측▼aSRAM | - |
dc.title | (An) energy-efficient absolute-difference-accumulation operation computing-in-memory processor with computation reuse | - |
dc.title.alternative | 연산 결과 재사용을 통한 에너지 효율적인 절대-차이-누적 연산의 메모리 내 컴퓨팅 프로세서 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전기및전자공학부, | - |
dc.contributor.alternativeauthor | 엄소연 | - |
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