Advanced AI Hardware Designs Based on FPGAs
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Joo-Young | ko |
| dc.date.accessioned | 2021-11-17T06:42:06Z | - |
| dc.date.available | 2021-11-17T06:42:06Z | - |
| dc.date.created | 2021-11-16 | - |
| dc.date.created | 2021-11-16 | - |
| dc.date.created | 2021-11-16 | - |
| dc.date.created | 2021-11-16 | - |
| dc.date.issued | 2021-10 | - |
| dc.identifier.citation | ELECTRONICS, v.10, no.20 | - |
| dc.identifier.issn | 2079-9292 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/289206 | - |
| dc.language | English | - |
| dc.publisher | MDPI | - |
| dc.title | Advanced AI Hardware Designs Based on FPGAs | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000715362700001 | - |
| dc.identifier.scopusid | 2-s2.0-85117583525 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 10 | - |
| dc.citation.issue | 20 | - |
| dc.citation.publicationname | ELECTRONICS | - |
| dc.identifier.doi | 10.3390/electronics10202551 | - |
| dc.contributor.localauthor | Kim, Joo-Young | - |
| dc.description.isOpenAccess | Y | - |
| dc.type.journalArticle | Editorial Material | - |
| dc.subject.keywordPlus | NEURAL-NETWORK | - |
| dc.subject.keywordPlus | IMPLEMENTATION | - |
| dc.subject.keywordPlus | ACCELERATOR | - |
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