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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Journal Papers(저널논문)

Vertical InGaAs Biristor for Sub-1 V Operation

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dc.contributor.authorKim, Wu-Kangko
dc.contributor.authorBidenko, Pavloko
dc.contributor.authorKim, Jongminko
dc.contributor.authorSim, Jaehoko
dc.contributor.authorHan, Joon-Kyuko
dc.contributor.authorKim, Seongkwangko
dc.contributor.authorGeum, Dae-Myeongko
dc.contributor.authorKim, Sanghyeonko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2021-05-25T06:10:12Z-
dc.date.available2021-05-25T06:10:12Z-
dc.date.created2021-05-25-
dc.date.created2021-05-25-
dc.date.issued2021-05-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.42, no.5, pp.681 - 683-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/285327-
dc.description.abstractA vertical bi-stable resistor (biristor) composed of In0.53Ga0.47As was demonstrated for sub-1 V operation. An inherent small bandgap and a scaled base length of 150 nm led to the remarkable reduction in latch-up voltage compared to Si(Ge)-based conventional biristors. The epitaxially grown n-p-n structure allowed an abrupt p-n junction, which was also very important to reduce the latch-up voltage. Furthermore, the physical mechanism of carrier transport in the InGaAs biristor was explored with TCAD simulations.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleVertical InGaAs Biristor for Sub-1 V Operation-
dc.typeArticle-
dc.identifier.wosid000645061400010-
dc.identifier.scopusid2-s2.0-85103786476-
dc.type.rimsART-
dc.citation.volume42-
dc.citation.issue5-
dc.citation.beginningpage681-
dc.citation.endingpage683-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2021.3070334-
dc.contributor.localauthorKim, Sanghyeon-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.contributor.nonIdAuthorKim, Wu-Kang-
dc.contributor.nonIdAuthorBidenko, Pavlo-
dc.contributor.nonIdAuthorKim, Jongmin-
dc.contributor.nonIdAuthorSim, Jaeho-
dc.contributor.nonIdAuthorGeum, Dae-Myeong-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorIndium gallium arsenide-
dc.subject.keywordAuthorSilicon-
dc.subject.keywordAuthorEpitaxial growth-
dc.subject.keywordAuthorSemiconductor process modeling-
dc.subject.keywordAuthorP-n junctions-
dc.subject.keywordAuthorLatches-
dc.subject.keywordAuthorIndium phosphide-
dc.subject.keywordAuthor3-D integration-
dc.subject.keywordAuthorabrupt junction artificial neural network-
dc.subject.keywordAuthorepitaxial growth-
dc.subject.keywordAuthorimpact ionization-
dc.subject.keywordAuthorInGaAs-
dc.subject.keywordAuthorvertical biristor-
dc.subject.keywordPlusVOLTAGE-
dc.subject.keywordPlusTRANSISTOR-
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