Study on interconnect resistance effect and its compensation methods for memristive neuromorphic device

Abstract

Due to low power characteristics, analog switching characteristics, non-volatility, and the advantage of being able to physically perform vector-matrix multiplication operations in the form of a crossbar array, memristor shows the possibility of a non-Von-Neumann structured parallel computing device. In particular, research on neuromorphic computing has been actively conducted due to the synaptic characteristics of memristors. However, some challenges such as non-linearity, switching variations, interconnect resistance inhibit implementing the practical neuromorphic device. Especially, interconnect resistance of lines of crossbar array causes errors in programming and reading operation and degrades device performance with increasing size. In this study, by modeling practical memristor and memristor crossbar array, the effect of interconnect resistance on neuromorphic device operation was investigated. Also, a quick and accurate compensating method to prevent the adverse effect of interconnect resistance is proposed and verified with simplified programming and reading operation using the self-rectification and high-resistance characteristics of a charge trap memristor.