(A) Quasi-Digital cap-less low-dropout regulator for PCRAM using OTS selector and a high power efficiency hybrid battery charger for quick charging system

Abstract

In Chapter 1, PMIC for PCRAM system using OTS is introduced. Phase change random access memory (PCRAM) has become the most promising candidate to replace flash memory to resolves the difference of access time between CPU and storage device of personal computer (PC) or smart device. A special device called an ovonic threshold switch (OTS) is being studied as a selector of memory cell. Because of the special I-V characteristic, OTS generates a spike current in the memory cell, which places a heavy burden on the power line of the PCRAM system. In transient-state, the load current of the PMIC in PCRAM system has a very fast rise time of less than 5 ns, and the maximum value of the spike is at least 10 times the flowing current. In this study, a comparator based Quasi-Digital low-dropout regulator was designed to overcome this problem. This ensures a 150mV overshoot and a settling time of less than 40ns to ensure the stable operation of the PCRAM system.

In Chapter 2, a high-efficiency smartphone battery charging circuit for fast charging is presented. As the smartphone technology develops, the capacity of the battery gradually increases and fast charging speed is required. For fast charging, it is required to supply a large current to a Li-ion battery. The supply of a large current causes a problem of heating problem and efficiency reduction of the charging circuit. In order to solve this problem, a current supply path using a capacitor is added in addition to a path using a inductor which is conventional design, thereby reducing the burden on the inductor and increasing the efficiency. As a simulated result of the proposed structure, it was confirmed that the efficiency increase by 5% or more than that of the conventional Buck structure.