Study on millimeter-wave frequency multipliers

Abstract

This dissertation presents three 94-GHz highly efficient frequency multipliers: push-push frequency doubler, frequency sextupler (multiply-by-six), and frequency octupler (multiply-by-eight). The proposed 94-GHz highly efficient push-push frequency doubler is designed by the proposed design methodology using the premade matching-network library. The design methodology finds the optimum design by schematic and layout co-optimization. The matching-network library generates the matching network with the least possible insertion loss for a given pair of input and output impedances. The proposed 94-GHz highly efficient frequency sextupler consists of the proposed 47-GHz self-mixing frequency tripler followed by the proposed 94-GHz push-push frequency doubler. The proposed 47-GHz frequency tripler is composed of three stacked components which include a 31.3-GHz push-push frequency doubler, a single-balanced up-conversion mixer, and a gate-source cross-coupled differential common-gate amplifier. The proposed 94-GHz highly efficient frequency octupler is made up of the proposed 47-GHz frequency quadrupler followed by the proposed 94-GHz push-push frequency doubler. The proposed 47-GHz frequency quadrupler adopts the current reusing technique of which transistors are biased to be in the Class-C region.