DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, Youngjin | - |
dc.contributor.advisor | 박영진 | - |
dc.contributor.author | Kim, Yeongseok | - |
dc.date.accessioned | 2021-05-12T19:40:06Z | - |
dc.date.available | 2021-05-12T19:40:06Z | - |
dc.date.issued | 2020 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=909368&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/284150 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 기계공학과, 2020.2,[v, 104 p. :] | - |
dc.description.abstract | Active noise control (ANC) is a technology that lowers noise level by using the principle of destructive interference of sound waves. Though recent developments in digital signal processing (DSP) have implemented ANC algorithms in real-time, ANC applications still face challenges due to the limited computational power of traditional DSP systems. Since the computing power of DSP systems determines an allowable number of hardware components or types of adaptive algorithms, there have been efforts to not only improve noise reduction performance but also reduce the computational complexity of ANC algorithms. Conventional ANC algorithms do not show fast convergence speed or robust stability against complexed or time-varying systems, where numerous hardware components are required, or optimal solution, which minimizes the noise level around error microphones, varies with time. Conventional ANC algorithms have experienced a degradation of noise reduction performance under noises with large spectral dynamics. In this research, heterogeneous computing architecture is proposed to overcome an insufficient computing power of DSP systems. It allocates output signal generation process into processor's computation, and weighting filter adaptation or derivation process into co-processor's computation so that block data transfer between memories of processor and co-processor does not introduce block delay to the output signal. Unlike conventional ANC algorithms which had not counted massive computing power of heterogeneous computing architecture, blockwise weighted least square ANC (BWLS-ANC) algorithm for heterogeneous computing architecture is developed in this research. BWLS-ANC algorithm directly derives a blockwise weighted least square solution minimizing the proposed cost function through co-processor's computation while generating the output signal through the processor's computation. The proposed cost function is designed to prevent problems of the conventional least square solution with ANC applications. Simulations and experiments to verify the feasibility of the proposed heterogeneous computing architecture for ANC algorithms and BWLS-ANC algorithm for heterogeneous computing architecture are conducted in this research. During feasibility analysis, CPU-GPU architecture, one of the most popular heterogeneous computing architecture, is considered throughout this research. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | active noise control▼aHeterogeneous computing architecture▼aGraphics Processing Units▼aCentral Processing Units▼aCPU-GPU architecture▼aBWLS-ANC▼amassive active noise control | - |
dc.subject | 능동 소음 제어▼a이기종 시스템▼a그래픽 카드▼a병렬 처리 장치▼a중앙 처리 장치▼a가중 최소 제곱해 | - |
dc.title | Active noise control for heterogeneous computing architecture | - |
dc.title.alternative | 이기종 연산 구조 기반 능동 소음 제어 : 연산 처리 분할 및 블록 가중 최소 제곱해 알고리즘 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :기계공학과, | - |
dc.contributor.alternativeauthor | 김영석 | - |
dc.title.subtitle | computing process allocation and blockwise weighted least square algorithm | - |
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