Study on stateful in-memory logic system and its practical implementation in a memristive crossbar array스테이트풀 인 메모리 로직 시스템과 멤리스터 크로스바 어레이에서의 실제 이행에 대한 연구

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dc.contributor.advisorKim, Kyung Min-
dc.contributor.advisor김경민-
dc.contributor.authorKim, Young Seok-
dc.date.accessioned2021-05-12T19:34:00Z-
dc.date.available2021-05-12T19:34:00Z-
dc.date.issued2020-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=909939&flag=dissertationen_US
dc.identifier.urihttp://hdl.handle.net/10203/283858-
dc.description학위논문(석사) - 한국과학기술원 : 신소재공학과, 2020.2,[v, 66 p. :]-
dc.description.abstractMemristors have been emerging as one of essential devices for future computing because of its innate switching and non-volatile characteristics. Especially, stateful logic technologies that execute logic operations in a memory can alleviate parasitic problems caused by conventional computing architecture such as Von Neumann bottleneck. However, since stateful logic has been developed assuming ideal conditions till now, its feasibility is difficult to be evaluated. In this thesis, we study a practical stateful logic system, including methods that screen stateful logic gates considering inherent stochasticity of memristors, an implementation of carry look-ahead adder through logic cascading, a layout that performs all functions of in memory computing, and an emulator that mimics in memory computing hardware.-
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectstateful logic▼ain memory computing▼amemristor▼aresistive switching memory▼avariability-
dc.subject스테이트풀 로직▼a인 메모리 컴퓨팅▼a멤리스터▼a저항변화메모리▼a가변성-
dc.titleStudy on stateful in-memory logic system and its practical implementation in a memristive crossbar array-
dc.title.alternative스테이트풀 인 메모리 로직 시스템과 멤리스터 크로스바 어레이에서의 실제 이행에 대한 연구-
dc.typeThesis(Master)-
dc.identifier.CNRN325007-
dc.description.department한국과학기술원 :신소재공학과,-
dc.contributor.alternativeauthor김영석-
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MS-Theses_Master(석사논문)
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