Evaluation of effective work function and electrical properties via post-deposition annealing on $GeO_2$/Ge based gate stack

Abstract

In this thesis, the effect of annealing on the $GeO_2$/Ge based gate stack was investigated. The interface trap density ($D_{it}$) between the high-k dielectric and germanium is high, which may adversely affect the driving of the device. The properties of the interface can be improved by using a germanium oxide between the high-k dielectric and germanium. The effective work function of the gate metal is reduced by annealing in the high-k/$GeO_2$/Ge gate stack, and the value is reduced by about 0.5 eV regardless of the kind of the gate metal. The change of effective work function was also confirmed by the MOSFET. For the analysis, the composition ratio depending on the position of the dielectric was confirmed through angle resolved X-ray photoelectron analysis. In addition, the $D_{it}$ was extracted by using conductance method, and the trapping efficiency and capture cross section were extracted and compared by constant current stress test (CCST) before and after annealing.