Memory, USB, and display devices, which are applied to the latest technology fields such as smartphones and electric vehicles, require high-speed channels for simultaneously transmitting large-scale data. Performance verification of these high-speed channels is essential in the design stage because the transmission performance decreases as the data-rate increases. Currently, performance verification using a simulation that can shorten the development period and cost is widely used. However, conventional simulation methods such as the vector fitting and the iterative extrapolation require high computational load to obtain accurate results, making it difficult to shorten analysis time and cost. Therefore, this thesis proposes efficient simulation methods to estimate eye-diagram, which is one of the most important indicators for verification of high-speed channel performance. In particular, we propose an accurate and efficient method that can extract the time response from the band-limited frequency response without low-frequency data based on the interpolation and extrapolation and the worst-case eye-diagram estimation method based on the hybrid algorithm.