Logic Device Based on Skyrmion Annihilation

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Skyrmion-based devices are an attractive candidate for nonvolatile memory and low-power computation. In a real device, however, skyrmions easily annihilate at device edges, which hampers device applications. Here, we present a novel skyrmion-based logic device, which takes advantage of the skyrmion annihilation (SA) and increases the efficiency of logic operation. An SA half adder (HA) is implemented in a ferromagnet/heavy metal nanotrack by introducing a geometric notch that annihilates the skyrmion. In addition, full adder and n-bit SA ripple-carry adder are demonstrated by directly cascading the SA HAs. The prototype of a 32-bit SA ripple-carry adder consumes energy as low as 0.62 pJ per each operation, which is only 18% of the previously proposed skyrmion adder. Our SA logic gate can, therefore, be a promising candidate for the beyond-CMOS logic device.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2021-04
Language
English
Article Type
Article
Citation

IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.4, pp.1939 - 1943

ISSN
0018-9383
DOI
10.1109/TED.2021.3055157
URI
http://hdl.handle.net/10203/282457
Appears in Collection
PH-Journal Papers(저널논문)EE-Journal Papers(저널논문)
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