Radiation-hardened-by-design (RHBD) techniques have kept evolving for the past decades to satisfy the requirements of irradiating environments; however, the possibilities of severe nuclear accidents still remain. To prevent and be well prepared for extreme events, advanced circuit designs reliable under harsh conditions are necessary. Successive approximation register (SAR) analog-to-digital converter (ADC) has advantages in regards to low power consumption and simple structure compared to any other types of ADCs. Various schemes of calibration for nonlinearity issues are reducing capacitor sizes. The main purpose is to design SAR ADC that sustains performance under radiating environments by optimizing sizes of MOSFETs. In the conference presentation, the proposed Successive Approximation Register Analog to Digital Converter size optimizations and layout for robust-to radiation device will be discussed with initial simulation results. General aspects of the circuit are left unchanged, only simple modifications have been made, thus easily adaptable to radiation hardening applications.