1024-Electrode Hybrid Voltage/Current-Clamp Neural Interface System-on-Chip with Dynamic Incremental-SAR Acquisition

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We present a neural interface system-on-chip (NISoC) with 1,024 channels of simultaneous electrical recording and stimulation for high-resolution high-throughput electrophysiology. The 2mm × 2mm NISoC in 65nm CMOS integrates a 32 × 32 array of electrodes vertically coupled to analog front-ends supporting both voltage and current clamping through a programmable interface, ranging over 100dB in voltage and 120dB in current, with 0.82μW power per channel at 5.96μV rms input-referred voltage noise from DC to 12.5kHz signal bandwidth. This includes on-chip acquisition with a back-end array of 32 dynamic incremental SAR ADCs for 25Msps 11-ENOB acquisition at 2fJ/level FOM.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Issue Date
2020-06
Language
English
Citation

2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020

DOI
10.1109/VLSICircuits18222.2020.9162837
URI
http://hdl.handle.net/10203/279888
Appears in Collection
BiS-Conference Papers(학술회의논문)
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