A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping

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dc.contributor.authorKim, Sangyeobko
dc.contributor.authorYoo, Hoi-Junko
dc.contributor.authorLEE, JUHYOUNGko
dc.contributor.authorKang, Sanghoonko
dc.contributor.authorLee, Jinmookko
dc.date.accessioned2020-12-15T22:50:21Z-
dc.date.available2020-12-15T22:50:21Z-
dc.date.created2020-12-01-
dc.date.created2020-12-01-
dc.date.created2020-12-01-
dc.date.issued2020-06-16-
dc.identifier.citationIEEE Symposium on VLSI Circuits, VLSI Circuits 2020-
dc.identifier.urihttp://hdl.handle.net/10203/278516-
dc.description.abstractAn energy efficient Deep-Neural-Network (DNN) learning processor is proposed for on-chip learning and iterative weight pruning (WP). This work has three key features: 1) stochastic coarse-fine pruning reduced computation workload by 99.7% compared with previous WP algorithm while maintaining high weight sparsity, 2) adaptive input/output/weight skipping (AIOWS) achieved 30.1× higher throughput than previous DNN learning processor [1] for not only the inference but also learning, 3) weight memory shared pruning unit removed on-chip weight memory access for WP. As a result, this work shows 146.52 TOPS/W energy efficiency, which is 5.79× higher than the state-of-the-art [1].-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleA 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping-
dc.typeConference-
dc.identifier.wosid000621657500022-
dc.identifier.scopusid2-s2.0-85090236046-
dc.type.rimsCONF-
dc.citation.publicationnameIEEE Symposium on VLSI Circuits, VLSI Circuits 2020-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationHonolulu, HI-
dc.identifier.doi10.1109/VLSICircuits18222.2020.9162795-
dc.contributor.localauthorYoo, Hoi-Jun-
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