DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jung, Myoungsoo | ko |
dc.contributor.author | Choi, Wonil | ko |
dc.contributor.author | Kwon, Miryeong | ko |
dc.contributor.author | Srikantaiah, Shekhar | ko |
dc.contributor.author | Yoo, Joonhyuk | ko |
dc.contributor.author | Kandemir, Mahmut Taylan | ko |
dc.date.accessioned | 2020-08-11T02:55:05Z | - |
dc.date.available | 2020-08-11T02:55:05Z | - |
dc.date.created | 2019-11-28 | - |
dc.date.issued | 2020-08 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.39, no.8, pp.1674 - 1687 | - |
dc.identifier.issn | 0278-0070 | - |
dc.identifier.uri | http://hdl.handle.net/10203/275768 | - |
dc.description.abstract | Garbage collection (GC) and resource contention on I/O buses (channels) are among the critical bottlenecks in solid-state disks (SSDs) that cannot be easily hidden. Most existing I/O scheduling algorithms in the host interface logic (HIL) of state-of-the-art SSDs are oblivious to such low-level performance bottlenecks in SSDs. As a result, SSDs may violate quality of service (QoS) requirements by not being able to meet the deadlines of I/O requests. In this paper, we propose a novel host interface I/O scheduler that is both GC aware and QoS aware. The proposed scheduler redistributes the GC overheads across non-critical I/O requests and reduces channel resource contention. Our experiments with workloads from various application domains revealed that the proposed client-level SSD scheduler reduces the standard deviation for latency by 52.5% and the worst-case latency by 86.6%, compared to the state-of-the-art I/O schedulers used for the HIL. In addition, for I/O requests smaller than a superpage, the proposed scheduler avoids channel resource conflicts and reduces latency by 29.2% in comparison to the state-of-the-art I/O schedulers. Furthermore, we present an extension of the proposed I/O scheduler for enterprise SSDs based on the NVMe protocol. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Design of a Host Interface Logic for GC-Free SSDs | - |
dc.type | Article | - |
dc.identifier.wosid | 000550655600011 | - |
dc.identifier.scopusid | 2-s2.0-85067013878 | - |
dc.type.rims | ART | - |
dc.citation.volume | 39 | - |
dc.citation.issue | 8 | - |
dc.citation.beginningpage | 1674 | - |
dc.citation.endingpage | 1687 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | - |
dc.identifier.doi | 10.1109/TCAD.2019.2919035 | - |
dc.contributor.localauthor | Jung, Myoungsoo | - |
dc.contributor.nonIdAuthor | Choi, Wonil | - |
dc.contributor.nonIdAuthor | Srikantaiah, Shekhar | - |
dc.contributor.nonIdAuthor | Yoo, Joonhyuk | - |
dc.contributor.nonIdAuthor | Kandemir, Mahmut Taylan | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Quality of service | - |
dc.subject.keywordAuthor | Software | - |
dc.subject.keywordAuthor | Parallel processing | - |
dc.subject.keywordAuthor | Protocols | - |
dc.subject.keywordAuthor | Performance evaluation | - |
dc.subject.keywordAuthor | Standards | - |
dc.subject.keywordAuthor | Complexity theory | - |
dc.subject.keywordAuthor | Garbage collection (GC) | - |
dc.subject.keywordAuthor | host interface | - |
dc.subject.keywordAuthor | solid-state disk (SSD) | - |
dc.subject.keywordPlus | FLASH TRANSLATION LAYER | - |
dc.subject.keywordPlus | GARBAGE COLLECTION | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | MEMORY | - |
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