DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shin, Gwang Hyuk | ko |
dc.contributor.author | Lee, Geon-Beom | ko |
dc.contributor.author | An, Eun-Su | ko |
dc.contributor.author | Park, Cheolmin | ko |
dc.contributor.author | Jin, Hyeok Jun | ko |
dc.contributor.author | Lee, Khang June | ko |
dc.contributor.author | Oh, Dong-Sik | ko |
dc.contributor.author | Kim, Jun-sung | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.contributor.author | Choi, Sung-Yool | ko |
dc.date.accessioned | 2020-03-19T02:22:15Z | - |
dc.date.available | 2020-03-19T02:22:15Z | - |
dc.date.created | 2020-01-06 | - |
dc.date.created | 2020-01-06 | - |
dc.date.issued | 2020-01 | - |
dc.identifier.citation | ACS APPLIED MATERIALS & INTERFACES, v.12, no.4, pp.5106 - 5112 | - |
dc.identifier.issn | 1944-8244 | - |
dc.identifier.uri | http://hdl.handle.net/10203/272601 | - |
dc.description.abstract | This work demonstrates a high-performance and hysteresis-free field-effect transistor based on two-dimensional (2D) semiconductors featuring a van der Waals heterostructure, MoS2 channel, and GaS gate insulator. The transistor exhibits a subthreshold swing of 63 mV/dec, an on/off ratio over 106 within a gate voltage of 0.4 V, and peak mobility of 83 cm2/(V s) at room temperature. The low-frequency noise characteristics were investigated and described by the Hooge mobility fluctuation model. The results suggest that the van der Waals heterostructure of 2D semiconductors can produce a high-performing interface without dangling bonds and defects caused by lattice mismatch. Furthermore, a logic inverter and a NAND gate are demonstrated, with an inverter voltage gain of 14.5, which is higher than previously reported by MoS2-based transistors with oxide dielectrics. Therefore, this transistor based on van der Waals heterostructure exhibits considerable potential in digital logic applications with low-power integrated circuits. | - |
dc.language | English | - |
dc.publisher | American Chemical Society | - |
dc.title | High-Performance Field-Effect Transistor and Logic Gates Based on GaS-MoS(2 )van der Waals Heterostructure | - |
dc.type | Article | - |
dc.identifier.wosid | 000510532000100 | - |
dc.identifier.scopusid | 2-s2.0-85078692531 | - |
dc.type.rims | ART | - |
dc.citation.volume | 12 | - |
dc.citation.issue | 4 | - |
dc.citation.beginningpage | 5106 | - |
dc.citation.endingpage | 5112 | - |
dc.citation.publicationname | ACS APPLIED MATERIALS & INTERFACES | - |
dc.identifier.doi | 10.1021/acsami.9b20077 | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.contributor.localauthor | Choi, Sung-Yool | - |
dc.contributor.nonIdAuthor | An, Eun-Su | - |
dc.contributor.nonIdAuthor | Jin, Hyeok Jun | - |
dc.contributor.nonIdAuthor | Oh, Dong-Sik | - |
dc.contributor.nonIdAuthor | Kim, Jun-sung | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | GaS | - |
dc.subject.keywordAuthor | MoS2 | - |
dc.subject.keywordAuthor | transistor | - |
dc.subject.keywordAuthor | heterostructure | - |
dc.subject.keywordAuthor | low-frequency noise | - |
dc.subject.keywordAuthor | logic operation | - |
dc.subject.keywordPlus | LOW-FREQUENCY NOISE | - |
dc.subject.keywordPlus | INTEGRATED-CIRCUITS | - |
dc.subject.keywordPlus | HIGH-MOBILITY | - |
dc.subject.keywordPlus | MOS2 | - |
dc.subject.keywordPlus | INTERFACE | - |
dc.subject.keywordPlus | TRANSITION | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | DEVICE | - |
dc.subject.keywordPlus | GAS | - |
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