This letter presents a three-stage differential power amplifier (PA) with an adaptive built-in linearizer (ABL) that achieves an enhanced AM-AM linearity. Series inductors are introduced at cascode internodes to improve the output matching conditions of the cascode amplifiers and stabilize a high-gain PA operation. Capacitors at the gate in the common-gate amplifiers at the power stage are used to achieve high differential gain by reducing RF coupling at the virtual ground and equalizing the drain-source voltage swings. Broad-side coupled transmission line transformers are used for all matching networks. It has 25.5-dB peak power gain and 12.2-dBm saturation output power at 110 GHz with 3-dB bandwidth of 92.5 and 117 GHz. It has a core chip size of 0.76 mm(2) and a peak power-added efficiency (PAE) of 8.5%.