DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Daewoong | ko |
dc.contributor.author | Lee, Dongil | ko |
dc.contributor.author | Kim, Yong-Hun | ko |
dc.contributor.author | Jeon, Hyun-Kyu | ko |
dc.contributor.author | Kim, Byung-Guk | ko |
dc.contributor.author | Kim, Lee-Sup | ko |
dc.date.accessioned | 2020-01-21T01:20:09Z | - |
dc.date.available | 2020-01-21T01:20:09Z | - |
dc.date.created | 2019-08-17 | - |
dc.date.created | 2019-08-17 | - |
dc.date.issued | 2020-01 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.1, pp.67 - 71 | - |
dc.identifier.issn | 1549-7747 | - |
dc.identifier.uri | http://hdl.handle.net/10203/271605 | - |
dc.description.abstract | This brief presents a quarter-rate 1 finite impulse response and 1 infinite impulse response (IIR) direct decision feedback equalizer (DFE). The proposed non-time-overlapping data generation enables the elimination of all two-stacked clocked transistors in the 4:1 current-mode-logic multiplexer of conventional quarter-rate IIR DFEs. Therefore, the feedback delay is improved without static current in the multiplexer of this brief. Fabricated in a 65-nm CMOS, the DFE achieves a power efficiency of 0.43 pJ/b at a data rate of 10.8 Gb/s in 1-V supply. A BER 10(-12) for an eye width of 0.36 UI was verified over a 26-dB PCB channel loss. Core area is 0.00544 mm(2). | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE with Non-Time-Overlapping Data Generation for 4:1 CMOS Clockless Multiplexer | - |
dc.type | Article | - |
dc.identifier.wosid | 000505528500015 | - |
dc.identifier.scopusid | 2-s2.0-85077366124 | - |
dc.type.rims | ART | - |
dc.citation.volume | 67 | - |
dc.citation.issue | 1 | - |
dc.citation.beginningpage | 67 | - |
dc.citation.endingpage | 71 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.identifier.doi | 10.1109/TCSII.2019.2901666 | - |
dc.contributor.localauthor | Kim, Lee-Sup | - |
dc.contributor.nonIdAuthor | Lee, Dongil | - |
dc.contributor.nonIdAuthor | Kim, Yong-Hun | - |
dc.contributor.nonIdAuthor | Jeon, Hyun-Kyu | - |
dc.contributor.nonIdAuthor | Kim, Byung-Guk | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Multiplexing | - |
dc.subject.keywordAuthor | Decision feedback equalizers | - |
dc.subject.keywordAuthor | Finite impulse response filters | - |
dc.subject.keywordAuthor | Transistors | - |
dc.subject.keywordAuthor | Delays | - |
dc.subject.keywordAuthor | IIR filters | - |
dc.subject.keywordAuthor | Feedback loop | - |
dc.subject.keywordAuthor | Decision feedback equalizer (DFE) | - |
dc.subject.keywordAuthor | finite impulse response (FIR) | - |
dc.subject.keywordAuthor | infinite impulse response (IIR) | - |
dc.subject.keywordAuthor | receiver | - |
dc.subject.keywordPlus | ADAPTATION | - |
dc.subject.keywordPlus | TAP | - |
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