This brief presents a quarter-rate 1 finite impulse response and 1 infinite impulse response (IIR) direct decision feedback equalizer (DFE). The proposed non-time-overlapping data generation enables the elimination of all two-stacked clocked transistors in the 4:1 current-mode-logic multiplexer of conventional quarter-rate IIR DFEs. Therefore, the feedback delay is improved without static current in the multiplexer of this brief. Fabricated in a 65-nm CMOS, the DFE achieves a power efficiency of 0.43 pJ/b at a data rate of 10.8 Gb/s in 1-V supply. A BER 10(-12) for an eye width of 0.36 UI was verified over a 26-dB PCB channel loss. Core area is 0.00544 mm(2).