Subthreshold current mode matrix determinant computation for analog signal processing

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The matrix determinant computation system (MDCS) is developed in subthreshold current-mode for an analog signal processing. By utilizing the translinear loop principle and the novel differential architecture, the MDCS can perform accurate addition, subtraction, and multiplication in analog domain. The system computes a 2-by-2 and 3-by-3 determinant with 91% accuracy and a 3 kHz input can be handled while consuming 110.05 μW. The overall system is fabricated on a 0.18 μm CMOS technology and the area is 500 μm x 800 μm.
Publisher
IEEE
Issue Date
2010-06-15
Language
English
Citation

2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.1260 - 1263

DOI
10.1109/ISCAS.2010.5537276
URI
http://hdl.handle.net/10203/269714
Appears in Collection
RIMS Conference Papers
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