DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yoo, Seyeon | ko |
dc.contributor.author | Choi, Seojin | ko |
dc.contributor.author | Kim, Juyeop | ko |
dc.contributor.author | Yoon, Heein | ko |
dc.contributor.author | Lee, Yongsun | ko |
dc.contributor.author | Choi, Jaehyouk | ko |
dc.date.accessioned | 2019-12-13T13:26:05Z | - |
dc.date.available | 2019-12-13T13:26:05Z | - |
dc.date.created | 2019-11-19 | - |
dc.date.issued | 2017-02-07 | - |
dc.identifier.citation | 64th IEEE International Solid-State Circuits Conference, ISSCC 2017, pp.324 - 325 | - |
dc.identifier.uri | http://hdl.handle.net/10203/269627 | - |
dc.description.abstract | To meet requirements of high data-rates, RF transceivers for a 5G standard must have an ultra-wide bandwidth in a mm-wave band. A big challenge of a 5G transceiver is to generate ultra-low-PN (phase noise) local-oscillator (LO) signals to suppress integrated PN (IPN) over such an extremely wide bandwidth. A PLL that directly generates mm-band LO signals is not a good choice due to power-hungry frequency dividers and relatively poor PN. An mm-band LO generator, cascading a GHz-range PLL and a frequency multiplier as shown in Fig. 19.2.1, is an attractive solution. First, a GHz-range PLL can have a higher FOM than a mm-band PLL [1]. Second, the cascaded architecture is naturally able to support the bands for 2G to 4G standards. An injection-locked frequency multiplier (ILFM) is popular in a mm-band, achieving ultra-low PN even in a tight power budget. However, the vulnerability of PN to PVT variations is a critical problem. For an ILFM, the PN performance can be improved only when the free-running VCO frequency, f | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | A PVT-robust -39dBc 1kHz-to-100MHz integrated-phase-noise 29GHz injection-locked frequency multiplier with a 600µW frequency-tracking loop using the averages of phase deviations for mm-band 5G transceivers | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 324 | - |
dc.citation.endingpage | 325 | - |
dc.citation.publicationname | 64th IEEE International Solid-State Circuits Conference, ISSCC 2017 | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | San Francisco Marriott Marquis Hotel | - |
dc.identifier.doi | 10.1109/ISSCC.2017.7870392 | - |
dc.contributor.nonIdAuthor | Yoo, Seyeon | - |
dc.contributor.nonIdAuthor | Choi, Seojin | - |
dc.contributor.nonIdAuthor | Kim, Juyeop | - |
dc.contributor.nonIdAuthor | Yoon, Heein | - |
dc.contributor.nonIdAuthor | Lee, Yongsun | - |
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