A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers

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To address the increasing demand for high-bandwidth mobile communications, 5G technology is targeted to support data-rates up to 10Gb/s. To reach this goal, one of challenging tasks for wireless transceivers is to generate millimeter-wave (mmW) band Lo signals that have an ultra-low integrated phase noise (IPN). The IPN of an LO signal should be reduced to less than -30dBc to satisfy the EVM requirements of high-order modulations, such as 64-QAM. Figure 23.1.1 shows the frequency spectrum for cellular systems, including existing bands below 6GHz and new mmW bands for 5G. A key goal of the evolution of mobile communications is to ensure interoperability with past-generation standards, and this is expected to continue for 5G. Thus, LO generators eventually will be designed to cover existing bands as well as mmW bands. There are many PLLs that can generate mmW signals directly [1,2], but their ability to achieve low IPN is limited. This is because they are susceptible to increases in in-band phase noise due to their large division numbers and out-of-band phase noise due to the low Q-factors of mmW VCOs. They also require a significant amount of power to operate high-frequency circuits, such as frequency dividers. In addition, they must divide frequencies again to support bands below 6GHz, resulting in the consumption of additional power.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Issue Date
2018-02-13
Language
English
Citation

65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.366 - 368

DOI
10.1109/ISSCC.2018.8310336
URI
http://hdl.handle.net/10203/269591
Appears in Collection
RIMS Conference Papers
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