Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Sharma, Hardik | ko |
| dc.contributor.author | PARK, JONGSE | ko |
| dc.contributor.author | Suda, Naveen | ko |
| dc.contributor.author | Lai, Liangzhen | ko |
| dc.contributor.author | Chau, Benson | ko |
| dc.contributor.author | Chandra, Vikas | ko |
| dc.contributor.author | Esmaeilzadeh, Hadi | ko |
| dc.date.accessioned | 2019-12-13T12:29:32Z | - |
| dc.date.available | 2019-12-13T12:29:32Z | - |
| dc.date.created | 2019-12-04 | - |
| dc.date.issued | 2018-06-03 | - |
| dc.identifier.citation | International Symposium on Computer Architecture (ISCA) | - |
| dc.identifier.uri | http://hdl.handle.net/10203/269579 | - |
| dc.language | English | - |
| dc.publisher | ACM/IEEE | - |
| dc.title | Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | International Symposium on Computer Architecture (ISCA) | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | InterContinental Los Angeles Downtown | - |
| dc.contributor.nonIdAuthor | Sharma, Hardik | - |
| dc.contributor.nonIdAuthor | Suda, Naveen | - |
| dc.contributor.nonIdAuthor | Lai, Liangzhen | - |
| dc.contributor.nonIdAuthor | Chau, Benson | - |
| dc.contributor.nonIdAuthor | Chandra, Vikas | - |
| dc.contributor.nonIdAuthor | Esmaeilzadeh, Hadi | - |
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