SOML Read: Rethinking the Read Operation Granularity of 3D NAND SSDs

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dc.contributor.authorJung, Myoungsooko
dc.contributor.authorLiu, Chun-Yiko
dc.contributor.authorKotra, Jagadish Bko
dc.contributor.authorKandemir, Mahmutko
dc.contributor.authorDas, Chita Rko
dc.date.accessioned2019-12-13T11:26:18Z-
dc.date.available2019-12-13T11:26:18Z-
dc.date.created2019-11-28-
dc.date.created2019-11-28-
dc.date.issued2019-04-18-
dc.identifier.citation24th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, (ASPLOS), pp.955 - 969-
dc.identifier.urihttp://hdl.handle.net/10203/269484-
dc.description.abstractNAND-based solid-state disks (SSDs) are known for their superior random read/write performance due to the high degrees of multi-chip parallelism they exhibit. Currently, as the chip density increases dramatically, fewer 3D NAND chips are needed to build an SSD compared to the previous generation chips. As a result, SSDs can be made more compact. However, this decrease in the number of chips also results in reduced overall throughput, and prevents 3D NAND high density SSDs from being widely-adopted. We analyzed 600 storage workloads, and our analysis revealed that the small read operations suffer significant performance degradation due to reduced chip-level parallelism in newer 3D NAND SSDs. The main question is whether some of the inter-chip parallelism lost in these new SSDs (due to the reduced chip count) can be won back by enhancing intra-chip parallelism. Motivated by this question, we propose a novel SOML (Single-Operation-Multiple-Location) read operation, which can perform several small intra-chip read operations to different locations simultaneously, so that multiple requests can be serviced in parallel, thereby mitigating the parallelism-related bottlenecks. A corresponding SOML read scheduling algorithm is also proposed to fully utilize the SOML read. Our experimental results with various storage workloads indicate that, the SOML read-based SSD with 8 chips can outperform the baseline SSD with 16 chips.-
dc.languageEnglish-
dc.publisherASPLOS-
dc.titleSOML Read: Rethinking the Read Operation Granularity of 3D NAND SSDs-
dc.typeConference-
dc.identifier.scopusid2-s2.0-85064632284-
dc.type.rimsCONF-
dc.citation.beginningpage955-
dc.citation.endingpage969-
dc.citation.publicationname24th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, (ASPLOS)-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationProvidence, RI-
dc.identifier.doi10.1145/3297858.3304035-
dc.contributor.localauthorJung, Myoungsoo-
dc.contributor.nonIdAuthorLiu, Chun-Yi-
dc.contributor.nonIdAuthorKotra, Jagadish B-
dc.contributor.nonIdAuthorKandemir, Mahmut-
dc.contributor.nonIdAuthorDas, Chita R-
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EE-Conference Papers(학술회의논문)
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