AXILOG: ABSTRACTIONS FOR APPROXIMATE HARDWARE DESIGN AND REUSE

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RELAXING THE TRADITIONAL ABSTRACTION OF "NEAR-PERFECT" ACCURACY IN HARDWARE DESIGN CAN YIELD SIGNIFICANT GAINS IN EFFICIENCY, AREA, AND PERFORMANCE. AXILOG, A SET OF LANGUAGE EXTENSIONS FOR VERILOG, PROVIDES THE NECESSARY SYNTAX AND SEMANTICS FOR APPROXIMATE HARDWARE DESIGN AND REUSE, LETTING DESIGNERS SAFELY RELAX ACCURACY REQUIREMENTS IN THE DESIGN WHILE KEEPING THE CRITICAL PARTS STRICTLY PRECISE.
Publisher
IEEE COMPUTER SOC
Issue Date
2015-09
Language
English
Article Type
Article
Citation

IEEE MICRO, v.35, no.5, pp.16 - 30

ISSN
0272-1732
DOI
10.1109/MM.2015.108
URI
http://hdl.handle.net/10203/269115
Appears in Collection
CS-Journal Papers(저널논문)
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