A Comparative Study of the Curing Effects of Local and Global Thermal Annealing on a FinFET
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Jun-Young | ko |
| dc.contributor.author | Lee, Geon-Beom | ko |
| dc.contributor.author | Choi, Yang-Kyu | ko |
| dc.date.accessioned | 2019-12-13T08:21:42Z | - |
| dc.date.available | 2019-12-13T08:21:42Z | - |
| dc.date.created | 2019-11-28 | - |
| dc.date.created | 2019-11-28 | - |
| dc.date.created | 2019-11-28 | - |
| dc.date.issued | 2019-08 | - |
| dc.identifier.citation | IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, v.7, no.1, pp.954 - 958 | - |
| dc.identifier.issn | 2168-6734 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/269069 | - |
| dc.description.abstract | Recently, localized thermal annealing has been spotlighted as an effective method to cure aged devices. The degraded gate oxide can be successfully cured by local annealing, which utilizes Joule heat inherently generated in the device. But, despite this advantage, there has been no study comparing the curing effects with various other annealing methods. In this study, the curing effects of local annealing and a conventional global annealing method applied to SOI FinFETs are compared. The measured electrical characteristics are discussed to evaluate the damage curing with respect to curing level and variability. | - |
| dc.language | English | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | A Comparative Study of the Curing Effects of Local and Global Thermal Annealing on a FinFET | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000495118900007 | - |
| dc.identifier.scopusid | 2-s2.0-85077754422 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 7 | - |
| dc.citation.issue | 1 | - |
| dc.citation.beginningpage | 954 | - |
| dc.citation.endingpage | 958 | - |
| dc.citation.publicationname | IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY | - |
| dc.identifier.doi | 10.1109/JEDS.2019.2937802 | - |
| dc.contributor.localauthor | Choi, Yang-Kyu | - |
| dc.description.isOpenAccess | Y | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordAuthor | Annealing | - |
| dc.subject.keywordAuthor | Curing | - |
| dc.subject.keywordAuthor | FinFETs | - |
| dc.subject.keywordAuthor | Logic gates | - |
| dc.subject.keywordAuthor | Human computer interaction | - |
| dc.subject.keywordAuthor | Stress | - |
| dc.subject.keywordAuthor | Damage curing | - |
| dc.subject.keywordAuthor | degradation | - |
| dc.subject.keywordAuthor | electrothermal annealing (ETA) | - |
| dc.subject.keywordAuthor | FinFET | - |
| dc.subject.keywordAuthor | forming gas annealing (FGA) | - |
| dc.subject.keywordAuthor | global annealing | - |
| dc.subject.keywordAuthor | hot-carrier injection (HCI) | - |
| dc.subject.keywordAuthor | Joule heat | - |
| dc.subject.keywordAuthor | local annealing | - |
| dc.subject.keywordAuthor | reliability | - |
| dc.subject.keywordAuthor | SOI FinFET | - |
| dc.subject.keywordPlus | DAMAGE | - |
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