An On-Chip Thermal Monitoring System With a Temperature Sensing Area of 52 mu m(2) in 180-nm CMOS

Abstract

In this brief, an on-chip remote thermal monitoring system with a temperature sensing area of 52 mu m(2) is proposed. To minimize the area, a diode-connected pMOS is exploited as the linear temperature sensing element and a read-out unit is shared among the sensors. The effect of parasitic resistance along the interconnect is reduced by the proposed voltage-to-time converter (VTC). For temperature independent read-out, two feedback loops are employed that exploit the stable period of a crystal oscillator. Implemented in 180-nm CMOS, the prototype IC achieves +2.3 degrees C/-2.2 degrees C error over 0 to 100 degrees C after one-point calibration at 25 degrees C.