H-2 High Pressure Annealed Y-Doped ZrO2 Gate Dielectric With an EOT of 0.57 nm for Ge MOSFETs

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dc.contributor.authorLee, Tae Inko
dc.contributor.authorManh-Cuong Nguyenko
dc.contributor.authorAhn, Hyunjunko
dc.contributor.author김민주ko
dc.contributor.authorShin, Eui Joongko
dc.contributor.authorHwang, Wan Sikko
dc.contributor.authorYu, Hyun-Youngko
dc.contributor.authorChoi, Rinoko
dc.contributor.authorCho, Byung Jinko
dc.date.accessioned2019-09-17T06:20:48Z-
dc.date.available2019-09-17T06:20:48Z-
dc.date.created2019-09-17-
dc.date.created2019-09-17-
dc.date.created2019-09-17-
dc.date.issued2019-09-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.40, no.9, pp.1350 - 1353-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/267507-
dc.description.abstractWe report on the impact of H-2 high pressure annealing (H-2-HPA) on a Y-doped ZrO2 (Y-ZrO2)/GeOx/Ge gate stack. In this paper, compared to conventional forming gas annealing (FGA), the H-2-HPA increased the k-value of the Y-doped ZrO2 gate dielectric to as high as 47.8 by enhancing the crystallization of the Y-ZrO2. This process can achieve an aggressively scaled equivalent oxide thickness (EOT) of 0.57 nm with an extremely low gate leakage current (J(g)) of 4.5 x 10(-6)A/cm(2). In addition, the H-2-HPA effectively passivated the dangling bonds and reduced the interface trap density (D-it) to as low as 3.4 x 10(11)eV(-1)cm(-2). The Ge pMOSFETs of the Y-ZrO2 with H-2-HPA led to a similar to 70% improvement in the effective hole mobility compared to the counterpart device with the conventional FGA. The device with H-2-HPA also showed an improved subthreshold swing (SS) value of 93 mV/dec compared to that with the FGA (135 mV/dec).-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleH-2 High Pressure Annealed Y-Doped ZrO2 Gate Dielectric With an EOT of 0.57 nm for Ge MOSFETs-
dc.typeArticle-
dc.identifier.wosid000483014600002-
dc.identifier.scopusid2-s2.0-85082884629-
dc.type.rimsART-
dc.citation.volume40-
dc.citation.issue9-
dc.citation.beginningpage1350-
dc.citation.endingpage1353-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2019.2928026-
dc.contributor.localauthorCho, Byung Jin-
dc.contributor.nonIdAuthorManh-Cuong Nguyen-
dc.contributor.nonIdAuthorHwang, Wan Sik-
dc.contributor.nonIdAuthorYu, Hyun-Young-
dc.contributor.nonIdAuthorChoi, Rino-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorGermanium-
dc.subject.keywordAuthorequivalent oxide thickness (EOT)-
dc.subject.keywordAuthorgate leakage current-
dc.subject.keywordAuthorinterface properties-
dc.subject.keywordAuthorMOSFET-
dc.subject.keywordAuthormobility-
dc.subject.keywordPlusTRANSISTORS-
dc.subject.keywordPlusEXTRACTION-
dc.subject.keywordPlusIMPACT-
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