In Chapter 1, a high-SNR inductor-free 3D hover sensor is presented. This work solved the low signal component issue, which is the biggest problem in 3D hover sensing. For this purpose, we propose a power- and cost-effective high-voltage driving technique in self-capacitance sensing scheme (SCSS) and lateral resolution optimization of a touch panel. In addition, the huge panel offsets in the SCSS from both vertical panel capacitance ($C_{SV}$) and horizontal panel capacitance ($C_{SH}$) can be effectively eliminated by exploiting the panel’s natural characteristics, without using other costly resources. Therefore, in the proposed design, the total calibration block is minimized only for parasitic capacitance mismatches. Lastly, by adopting new driving scheme, two-phase simultaneous sensing is enabled to increase the SNR further. The proposed hover sensing system achieved a 39 dB SNR at a 1 cm hover point under a 240 Hz scan rate condition in noise experiments, while consuming $183 \mu W$/electrode and 0.73 $mm^2$/sensor, which are the lowest power per electrode performance and the smallest die-area per sensor performance, respectively, in comparison to the state-of-the-art 3D hover systems.
In Chapter 2, a dual-path step-down converter (DPNC) is presented for achieving high power efficiency in the mobile PMICs. Adopting a hybrid structure using one inductor and one flying capacitor, the proposed DPNC supplies a load current via two parallel paths, solved an intrinsic problem of CBT, which is a significant power loss from a large DCR of the inductor ($R_{DCR}$). Therefore, DPNC not only achieves a high power efficiency, but also reduces a heating problem, which is another critical issue in the mobile set. Moreover, DPNC can shrink the volume of the PMIC set with a low manufacturing cost, by alleviating a RDCR specification of the inductor. In this paper, although a 250 $m \omega$ of large $R_{DCR}$ inductor is used for our measurements, a 96.2 % of peak efficiency was achieved and the power loss of total parasitic resistances can be reduced to up to 30% of that of conventional buck converter. Moreover, according to our measurement plots, it was verified that DPNC achieves much higher efficiency not only in a wide load current ($I_{LOAD}$) range, but also in a wide conversion ratio ($V_{OUT}$/$V_{IN}$) range, compared to the conventional buck converter.