DC Field | Value | Language |
---|---|---|
dc.contributor.author | Huh, Yeunhee | ko |
dc.contributor.author | Hong, Sung-Wan | ko |
dc.contributor.author | Cho, Gyu-Hyeong | ko |
dc.date.accessioned | 2019-04-18T01:10:03Z | - |
dc.date.available | 2019-04-18T01:10:03Z | - |
dc.date.created | 2019-04-16 | - |
dc.date.issued | 2019-04 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.4, pp.959 - 967 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/261001 | - |
dc.description.abstract | A dual-path step-down converter (DPDC) is presented for achieving high power efficiency in the mobile power management ICs (PMICs). Adopting a hybrid structure using one inductor and one flying capacitor, the proposed DPDC supplies a load current via two parallel paths, relieved an intrinsic problem of the conventional buck converter (CBC) topology, which is a significant power loss from a large DCR of the inductor (R-DCR). Therefore, DPDC achieves a high power efficiency and thus also reduces the heating problem, which is another critical issue in the mobile set. Moreover, DPDC can shrink the volume of the PMIC set with a low manufacturing cost by alleviating an R-DCR specification of the inductor. In this paper, although a 250 m Omega of large R-DCR inductor is used for our measurements, a 96.2% of peak efficiency was achieved and the power loss of total parasitic resistances can be reduced to up to 30% of that of CBC. Moreover, according to our measurement plots, it is verified that DPDC achieves the efficiency notably higher not only in a wide load current (I-LOAD) range but also in a wide conversion ratio (V-OUT/V-IN) range, compared to CBC. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m Omega Large-DCR Inductor | - |
dc.type | Article | - |
dc.identifier.wosid | 000463024200006 | - |
dc.type.rims | ART | - |
dc.citation.volume | 54 | - |
dc.citation.issue | 4 | - |
dc.citation.beginningpage | 959 | - |
dc.citation.endingpage | 967 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.identifier.doi | 10.1109/JSSC.2018.2882526 | - |
dc.contributor.localauthor | Cho, Gyu-Hyeong | - |
dc.contributor.nonIdAuthor | Hong, Sung-Wan | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordAuthor | Buck | - |
dc.subject.keywordAuthor | dc resistance (DCR) | - |
dc.subject.keywordAuthor | dc-dc converter | - |
dc.subject.keywordAuthor | dual-path | - |
dc.subject.keywordAuthor | equivalent series resistance (ESR) | - |
dc.subject.keywordAuthor | hybrid | - |
dc.subject.keywordAuthor | parasitic resistance | - |
dc.subject.keywordAuthor | step-down | - |
dc.subject.keywordPlus | FREQUENCY | - |
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