Instruction decoding method for microprocessor, involves disabling buffer and decoding instruction using values read from memory when read and obtained instructions do not correspond

Abstract

The instructions read from memory (1) is compared with that of statically obtained instruction set (SE) to be decoded. If both instructions corresponds to each other, signal combined with instruction decoding prefetching buffer (IDLB) is held to prevent logical transition in instruction decoder. If the instructions does not correspond, IDLB is disabled and instruction is decoded using value read from memory. The statically obtained instruction set (SE) includes instructions which are called up most frequently during execution of application programs during microprocessor design simulation. The logical transitions of bits of instructions in the instruction decoder causes power consumption. The instructions read from the memory is compared with obtained instruction set. When both does not correspond to each other, normal instruction decoding is executed using instructions read from the memory.