Asynchronous reorder buffer for asynchronous on-chip bus

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dc.contributor.authorJung, EGko
dc.contributor.authorHar, Dongsooko
dc.date.accessioned2019-04-15T16:31:42Z-
dc.date.available2019-04-15T16:31:42Z-
dc.date.created2013-05-08-
dc.date.issued2005-12-
dc.identifier.citationIEICE TRANSACTIONS ON ELECTRONICS, v.E88C, no.12, pp.2391 - 2394-
dc.identifier.issn0916-8524-
dc.identifier.urihttp://hdl.handle.net/10203/255876-
dc.description.abstractIn this letter, a new asynchronous Re-Order Buffer (ROB) with fully distributed control is proposed for an asynchronous on-chip bus. Due to the fully distributed control by each dedicated controller, the proposed ROB has high modularity and scalability. Simulation results show that the proposed asynchronous ROB can operate on an asynchronous on-chip bus of 2.01 Gbit/s throughput and 0.232 nJ power consumption per bus transaction.-
dc.languageEnglish-
dc.publisherIEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG-
dc.titleAsynchronous reorder buffer for asynchronous on-chip bus-
dc.typeArticle-
dc.identifier.wosid000234280500035-
dc.identifier.scopusid2-s2.0-29144530238-
dc.type.rimsART-
dc.citation.volumeE88C-
dc.citation.issue12-
dc.citation.beginningpage2391-
dc.citation.endingpage2394-
dc.citation.publicationnameIEICE TRANSACTIONS ON ELECTRONICS-
dc.identifier.doi10.1093/ietele/e88-c.12.2391-
dc.contributor.localauthorHar, Dongsoo-
dc.contributor.nonIdAuthorJung, EG-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorasynchronous reorder buffer-
dc.subject.keywordAuthorasynchronous on-chip bus-
dc.subject.keywordAuthorGALS-
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