LDPC decoder, semiconductor memory system and operating method thereof

Abstract

An operation method for a low density parity check (LDPC) decoder which includes performing an initial update operation to variable nodes by updating a codeword to the variable nodes, performing a decoding operation to the codeword based on an original parity check matrix, generating a modified parity check matrix by changing data of rows of the original parity check matrix corresponding to check nodes with dummy data, performing a node update operation based on the modified parity check matrix and performing a predetermined number of single iterations of the above processes until the decoding operation is successful.