DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Gyu-Hyeong | ko |
dc.contributor.author | Lee, Ji-Hun | ko |
dc.date.accessioned | 2019-04-15T15:59:14Z | - |
dc.date.available | 2019-04-15T15:59:14Z | - |
dc.date.issued | 2018-07-24 | - |
dc.identifier.uri | http://hdl.handle.net/10203/255538 | - |
dc.description.abstract | A class-D amplifier includes an error amplification circuit, a duty signal generator, a level selection circuit, a driver and control block and an output stage. The class-D amplifier divides peal levels of an error signal into multi-level and changes a scheme for modulating the error signal when the error signal crosses each level boundary of the multi-level thereby to have an effect such as the error signal is folded. Therefore, the class-D amplifier drives output nodes with multi-level and thus the class-D amplifier may increasing efficiency while reducing EMI. | - |
dc.title | Class-D amplifier, audio processing apparatus and method of driving class-D amplifier | - |
dc.title.alternative | D 클래스 증폭기, 음성 처리 장치 및 D 클래스 증폭기를 구동시키는 방법 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Cho, Gyu-Hyeong | - |
dc.contributor.nonIdAuthor | Lee, Ji-Hun | - |
dc.contributor.assignee | KAIST | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 15345926 | - |
dc.identifier.patentRegistrationNumber | 10,034,085 | - |
dc.date.application | 2016-11-08 | - |
dc.date.registration | 2018-07-24 | - |
dc.publisher.country | US | - |
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