DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ha, Jeongseok | ko |
dc.contributor.author | Jeong, Su-Hwang | ko |
dc.contributor.author | Kim, Dae-Sung | ko |
dc.date.accessioned | 2019-04-15T14:19:51Z | - |
dc.date.available | 2019-04-15T14:19:51Z | - |
dc.date.issued | 2018-11-27 | - |
dc.identifier.uri | http://hdl.handle.net/10203/254108 | - |
dc.description.abstract | A memory system includes a memory device; and a controller suitable for encoding a message, storing the encoded message in the memory device and decoding the encoded message, wherein the controller is suitable for generating a message matrix including predetermined row codes and predetermined column codes symmetrical to the predetermined row codes, with the message or the encoded message using a block-wise concatenated Bose-Chadhuri-Hocquenghem (BCH) code with a symmetrical structure. | - |
dc.title | Memory system and operating method thereof | - |
dc.title.alternative | 메모리 시스템 및 그의 동작 방법 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Ha, Jeongseok | - |
dc.contributor.nonIdAuthor | Jeong, Su-Hwang | - |
dc.contributor.nonIdAuthor | Kim, Dae-Sung | - |
dc.contributor.assignee | KAIST, SK Hynix Inc | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 15279028 | - |
dc.identifier.patentRegistrationNumber | 10141952 | - |
dc.date.application | 2016-09-28 | - |
dc.date.registration | 2018-11-27 | - |
dc.publisher.country | US | - |
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