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Results 1-1 of 1 (Search time: 0.003 seconds).

NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
1
Automatic test pattern generation for stuck-at and delay faults in combinational circuits = 조합논리회로의 정적 및 동적고장에 대한 자동검사입력단 생성에 관한 연구link

Kim, Dae-Sik; 김대식; Seong, Poong-Hyun; 성풍현, 한국과학기술원, 1998

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