DNPU: An 8.1TOPS/W Reconfigurable CNN-RNN Processor for General-Purpose Deep Neural Networks
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Shin, Dongjoo | ko |
| dc.contributor.author | Lee, Jinmook | ko |
| dc.contributor.author | Lee, Jinsu | ko |
| dc.contributor.author | Yoo, Hoi-Jun | ko |
| dc.date.accessioned | 2019-01-22T08:16:25Z | - |
| dc.date.available | 2019-01-22T08:16:25Z | - |
| dc.date.created | 2018-12-19 | - |
| dc.date.created | 2018-12-19 | - |
| dc.date.created | 2018-12-19 | - |
| dc.date.issued | 2017-02 | - |
| dc.identifier.citation | 64th IEEE International Solid-State Circuits Conference (ISSCC), pp.240 - 242 | - |
| dc.identifier.issn | 0193-6530 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/248955 | - |
| dc.language | English | - |
| dc.publisher | IEEE | - |
| dc.title | DNPU: An 8.1TOPS/W Reconfigurable CNN-RNN Processor for General-Purpose Deep Neural Networks | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000403393800097 | - |
| dc.identifier.scopusid | 2-s2.0-85016233263 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 240 | - |
| dc.citation.endingpage | 242 | - |
| dc.citation.publicationname | 64th IEEE International Solid-State Circuits Conference (ISSCC) | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | San Francisco Marriott Marquis | - |
| dc.identifier.doi | 10.1109/isscc.2017.7870350 | - |
| dc.contributor.localauthor | Yoo, Hoi-Jun | - |
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