A 22.8-to-32.4 GHz Injection-locked Frequency Tripler with Source Degeneration

Abstract

In this paper, injection-locked frequency tripler with wide locking range and high fundamental tone rejection is presented. Undesired fundamental harmonic due to the injected signal is notched out with the source degeneration. Prototype circuit is designed in 45-nm CMOS technology and achieves 28.4 dBc of harmonic rejection ratio. The tripler exhibits 34.8% of locking range with 4 dBm of input signal power. With 1.1 V of supply voltage, the core circuit consumes 5.2 mA and occupies only 265μm x 160μm of chip-area.