DSpace at KOASAS
College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Journal Papers(저널논문)

High Breakdown and 1/f Noise Enhancement n-MOSFET Suitable for Analog MOS Intergrated Circuits

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 264
  • Download : 1
Export
DC FieldValueLanguage
dc.contributor.authorPark, Heung-joonko
dc.contributor.authorLee, Kwyroko
dc.contributor.authorKim, Sunkiko
dc.contributor.authorSuh, Chung Hko
dc.date.accessioned2011-07-20T06:09:30Z-
dc.date.available2011-07-20T06:09:30Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1995-06-
dc.identifier.citationKITE JOURNAL OF ELECTRONICS ENGINEERING, v.6, no.2, pp.1 - 4-
dc.identifier.issn1016-3417-
dc.identifier.urihttp://hdl.handle.net/10203/24660-
dc.description.abstractBuried-channel enhancement n-MOSFET using p-type doped polysilicon gate for high performance MOS integrated circuits is presented. Copmared to the conventional enhancement n-MOSFET, this device shows much higher breakdown voltage, smaller hot electron effect, and lower 1/f noise characteristics, with their almost identical static I-V characteristics in the linear and saturation regions.-
dc.languageKorean-
dc.language.isoen_USen
dc.publisher대한전자공학회-
dc.titleHigh Breakdown and 1/f Noise Enhancement n-MOSFET Suitable for Analog MOS Intergrated Circuits-
dc.typeArticle-
dc.type.rimsART-
dc.citation.volume6-
dc.citation.issue2-
dc.citation.beginningpage1-
dc.citation.endingpage4-
dc.citation.publicationnameKITE JOURNAL OF ELECTRONICS ENGINEERING-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorLee, Kwyro-
dc.contributor.nonIdAuthorPark, Heung-joon-
dc.contributor.nonIdAuthorKim, Sunki-
dc.contributor.nonIdAuthorSuh, Chung H-
Appears in Collection
EE-Journal Papers(저널논문)
Files in This Item

Display Simple Item Record

qr_code

  • mendeley

    citeulike

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.


rss_1.0 rss_2.0 atom_1.0