This paper presents a reference-less baud-rate digital clock and data recovery (CDR) with a data decision feedback (DDF) with a direct feedback method (DFM). The DDF with DFM has been used for the equalization of the channel loss for the serial link with a decision feedback equalizer (DFE). However, we apply DDF with DFM to the baud-rate CDR to reduce the number of data samplers which is dropped to 2/3 compared to conventional baud-rate CDR. As a result, the power consumption and mismatch problem of the data samplers can be reduced. The test chip fabricated in 65 nm CMOS technology operates at 10 Gb/s data rate with 13.84 mW power consumption.