A 10 Gb/s Reference-Less Baud-Rate CDR for Low Power Consumption with Direct Feedback Method

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This paper presents a reference-less baud-rate digital clock and data recovery (CDR) with a data decision feedback (DDF) with a direct feedback method (DFM). The DDF with DFM has been used for the equalization of the channel loss for the serial link with a decision feedback equalizer (DFE). However, we apply DDF with DFM to the baud-rate CDR to reduce the number of data samplers which is dropped to 2/3 compared to conventional baud-rate CDR. As a result, the power consumption and mismatch problem of the data samplers can be reduced. The test chip fabricated in 65 nm CMOS technology operates at 10 Gb/s data rate with 13.84 mW power consumption.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2018-11
Language
English
Article Type
Article
Keywords

DATA RECOVERY CIRCUITS; CMOS TECHNOLOGY; CLOCK; EQUALIZER; FREQUENCY; LOOP; IIR

Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.11, pp.1539 - 1543

ISSN
1549-7747
DOI
10.1109/TCSII.2017.2758923
URI
http://hdl.handle.net/10203/246512
Appears in Collection
EE-Journal Papers(저널논문)
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