Design optimization for an SOI MOEMS accelerometer

Abstract

With optimization being vital, the design optimization of a silicon-on-insulator (SOI) micro-opto-electro-mechanical systems accelerometer is discussed in this paper. This process has enabled a simplistic design that employs double-sided deep reactive ion etching (DRIE) on SOI wafer to be able to attain high sensitivity of 294 A mu W/G with a calculated proof mass displacement of 0.066 A mu m/G which was close to ANSYS simulated results of 0.061 A mu m/G. Optimization has also enabled an in-depth study of the effects of the different variables on the overall performance of the device.