P-MOSFET latch-based monolithic signal-processing circuit for nuclear event detector

Abstract

This paper presents a p-MOSFET latch-based nuclear event detector signal-processing circuit which is implemented using a commercial standard 0.35-mu m CMOS process. A positive-feedback loop consisting of a p-MOSFET with a common-source configuration and a photocurrent compensation MOSFET are used to offset the transient radiation effects. Additionally, a timer circuit containing an on-chip timer capacitor serves to reduce the response time. To mitigate the total ionizing dose effect, all n-MOSFETs are laid out using dummy gate-assisted n-MOSFETs. The measured response time of the fabricated chip is 12.2 ns. After measuring the electrical characteristics of the fabricated chip, the chip is exposed to Co-60 gamma rays at a dose of 1.14 Mrad (Si). Even after exposure to radiation, the performance of the irradiated chip is nearly identical to that of a non-irradiated chip. To evaluate the upset threshold with regard to the dose rate of the fabricated chip, the chip is also exposed to prompt gamma rays with different dose rates, and the measured dose rate upset threshold is found to exceed 1.9x10(7) rad(Si)/s.