A 2.4GHz,-102dBm-Sensitivity, 25kb/s, 0.466mW Interference Resistant BFSK Multi-Channel Sliding-IF ULP Receiver

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This paper presents an ultra-low power, high-sensitivity, and interference-resistant receiver suitable for loT applications. By the combination of sliding-IF based low-power down-conversion and relative-power-detection based FSK demodulation, the proposed receiver achieves multi-channel operation and minimizes power consumption. Cascaded N-path filter and 4th-order hybrid-PPF are adopted to improve the sensitivity and carrier-to-interference ratio. Implemented in a 65nm CMOS, the receiver achieves -102dBm sensitivity at 0.1% BER while consuming 466 mu W from a 0.6V supply.
Publisher
IEEE
Issue Date
2018-01
Language
English
Citation

23rd Asia and South Pacific Design Automation Conference (ASP-DAC), pp.319 - 320

ISSN
2153-697X
DOI
10.1109/ASPDAC.2018.8297339
URI
http://hdl.handle.net/10203/244199
Appears in Collection
EE-Conference Papers(학술회의논문)
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