(An) efficient pruning method and its hardware architecture for successive-cancellation decoding of polar codes극 부호의 연속 제거 복호를 위한 효율적인 가지치기 방법과 하드웨어 구조

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dc.contributor.advisorPark, In-Cheol-
dc.contributor.advisor박인철-
dc.contributor.authorChoi, Jaejoon-
dc.date.accessioned2018-06-20T06:22:39Z-
dc.date.available2018-06-20T06:22:39Z-
dc.date.issued2017-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=675449&flag=dissertationen_US
dc.identifier.urihttp://hdl.handle.net/10203/243340-
dc.description학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2017.2,[iii, 30 p. :]-
dc.description.abstractPolar codes are a class of error-correcting codes that provably achieve the channel capacity with the low-complexity encoding and decoding algorithms. Traditionally, successive-cancellation decoding is widely to decode polar codes. However, the serial nature of SC decoding leads to a long latency for long polar codes. This thesis proposes an improved method for the successive-cancellation decoding of polar codes to reduce the long latency. To avoid computations associated with redundant tree-traversals and syndrome calculations, recursive properties of polar codes are newly exploited in the proposed algorithm. Instead of computing a syndrome vector at every node, some syndrome vectors are directly obtained by recursively decomposing the syndrome vector computed previously. Furthermore, a modified syndrome check rule is proposed to prune unnecessary sub-trees efficiently. Compared to the latest pruning method, the proposed pruning method reduces the latency by 23% for a (2048, 1024) polar code without sacrificing the error-correcting performance. Moreover, the thesis proposes an efficient hardware architecture implementing the proposed SC decoding algorithm. A depth-constraint and a hardware sharing scheme are adopted to increase the hardware efficiency. As a result, the throughput of the polar decoder increases significantly at the cost of small amount of the additional hardware.-
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectPolar codes-
dc.subjectpolar decoder-
dc.subjectsuccessive-cancellation decoding-
dc.subjectsyndrome check-
dc.subjectpruning method-
dc.subjectlow latency-
dc.subject극 부호-
dc.subject극 부호 복호기-
dc.subject연속 제거 복호-
dc.subject신드롬 체크-
dc.subject가지치기 방법-
dc.subject낮은 지연 시간-
dc.title(An) efficient pruning method and its hardware architecture for successive-cancellation decoding of polar codes-
dc.title.alternative극 부호의 연속 제거 복호를 위한 효율적인 가지치기 방법과 하드웨어 구조-
dc.typeThesis(Master)-
dc.identifier.CNRN325007-
dc.description.department한국과학기술원 :전기및전자공학부,-
dc.contributor.alternativeauthor최재준-
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EE-Theses_Master(석사논문)
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