DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Yong-Chang | ko |
dc.contributor.author | Shin, Sounghun | ko |
dc.contributor.author | Yoo, Sang-Sun | ko |
dc.contributor.author | Yoo, Hyung-Joun | ko |
dc.date.accessioned | 2018-06-16T07:38:21Z | - |
dc.date.available | 2018-06-16T07:38:21Z | - |
dc.date.created | 2018-05-18 | - |
dc.date.created | 2018-05-18 | - |
dc.date.created | 2018-05-18 | - |
dc.date.issued | 2018-04 | - |
dc.identifier.citation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.18, no.2, pp.211 - 217 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | http://hdl.handle.net/10203/242560 | - |
dc.description.abstract | This paper presents a high efficiency voltage-and-digitally controlled oscillator (VDCO) for a multi-standard hybrid PLL. It adopts a fixed-bias class-B topology and high-speed dithering technique that saves power consumption for the same phase noise performance. The proposed VDCO is a dual controllable oscillator which can be driven simultaneously by an analog voltage and a digital word. It operates from 3 GHz to 4.9 GHz, covering bands of GSM/EDGE and LTE. In the GSM/EDGE mode, the VDCO behaves as a phase modulator which has a 0.9 degree root-mean-square (RMS) phase error and EVM of 2.87% with power consumption of 19.5 mW. In the LTE mode, the VDCO operates just as a voltage-controlled oscillator (VCO) which has an RMS jitter of 350 fs with power consumption of 12 mW. The resulting figure-of-merit of the proposed VDCO is 183.8 dBc/Hz, which is superior to recent multi-standard oscillators. This VDCO is implemented in a 65-nm CMOS technology and occupies 0.16 mm(2) | - |
dc.language | English | - |
dc.publisher | IEEK PUBLICATION CENTER | - |
dc.title | A Voltage-and-Digitally Controlled Oscillator with High Efficiency for a Multi-standard Hybrid PLL | - |
dc.type | Article | - |
dc.identifier.wosid | 000432340100013 | - |
dc.identifier.scopusid | 2-s2.0-85046409522 | - |
dc.type.rims | ART | - |
dc.citation.volume | 18 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 211 | - |
dc.citation.endingpage | 217 | - |
dc.citation.publicationname | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.identifier.doi | 10.5573/JSTS.2018.18.2.211 | - |
dc.contributor.localauthor | Yoo, Hyung-Joun | - |
dc.contributor.nonIdAuthor | Shin, Sounghun | - |
dc.contributor.nonIdAuthor | Yoo, Sang-Sun | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | High efficiency oscillator | - |
dc.subject.keywordAuthor | hybrid PLL | - |
dc.subject.keywordAuthor | LTE | - |
dc.subject.keywordAuthor | multi-standard oscillator | - |
dc.subject.keywordAuthor | polar transmitter | - |
dc.subject.keywordAuthor | VDCO | - |
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