Vertical tunneling filed effect transistor based on p++ silicon and MoS2 heterostructure
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Shin, Gwang Hyuk | ko |
| dc.contributor.author | Park, Hamin | ko |
| dc.contributor.author | Koo, BonDae | ko |
| dc.contributor.author | Woo, youngjun | ko |
| dc.contributor.author | LEE, JAEEUN | ko |
| dc.contributor.author | Choi, Sung-Yool | ko |
| dc.date.accessioned | 2018-05-23T06:14:51Z | - |
| dc.date.available | 2018-05-23T06:14:51Z | - |
| dc.date.created | 2018-04-23 | - |
| dc.date.created | 2018-04-23 | - |
| dc.date.created | 2018-04-23 | - |
| dc.date.issued | 2018-03-29 | - |
| dc.identifier.citation | 제 5회 한국 그래핀 심포지엄 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/241490 | - |
| dc.language | English | - |
| dc.publisher | 제 5회 한국 그래핀 심포지엄 | - |
| dc.title | Vertical tunneling filed effect transistor based on p++ silicon and MoS2 heterostructure | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | 제 5회 한국 그래핀 심포지엄 | - |
| dc.identifier.conferencecountry | KO | - |
| dc.identifier.conferencelocation | 부여 롯데리조트 | - |
| dc.contributor.localauthor | Choi, Sung-Yool | - |
| dc.contributor.nonIdAuthor | Koo, BonDae | - |
| dc.contributor.nonIdAuthor | Woo, youngjun | - |
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